Static random access memory (SRAM) arrays are commonly used for data storage in integrated circuit devices. Recent advances in fin field effect transistor (finFET) technology have made advanced SRAM cells using finFET transistors possible. SRAM array performance is often layout dependent. For example, a position at which an SRAM cell lines in an SRAM array sometimes causes an inner cell of an SRAM array to perform differently from an edge cell of the SRAM array. Thus, SRAM cell layouts may be used to improve the performance of an SRAM array.